Index: i80321_pci.c
===================================================================
--- i80321_pci.c	(revision 197735)
+++ i80321_pci.c	(working copy)
@@ -92,8 +92,7 @@
 	sc->sc_busno = busno;
 	sc->sc_pciio = &i80321_softc->sc_pci_iot;
 	sc->sc_pcimem = &i80321_softc->sc_pci_memt;
-	sc->sc_mem = i80321_softc->sc_owin[0].owin_xlate_lo +
-	    VERDE_OUT_XLATE_MEM_WIN_SIZE;
+	sc->sc_mem = i80321_softc->sc_owin[0].owin_xlate_lo;
 	
 	sc->sc_io = i80321_softc->sc_iow_vaddr;
 	/* Initialize memory and i/o rmans. */
@@ -110,7 +109,8 @@
 	sc->sc_mem_rman.rm_descr = "I80321 PCI Memory";
 	if (rman_init(&sc->sc_mem_rman) != 0 ||
 	    rman_manage_region(&sc->sc_mem_rman, 
-	    0, VERDE_OUT_XLATE_MEM_WIN_SIZE) != 0) {
+	    VERDE_OUT_XLATE_MEM_WIN0_BASE,
+		VERDE_OUT_XLATE_MEM_WIN0_BASE + VERDE_OUT_XLATE_MEM_WIN_SIZE) != 0) {
 		panic("i80321_pci_probe: failed to set up memory rman");
 	}
 	sc->sc_irq_rman.rm_type = RMAN_ARRAY;
@@ -297,6 +297,9 @@
 		    sc->sc_mem;
 		start &= (0x1000000 - 1);
 		end &= (0x1000000 - 1);
+		start += 0x80000000;
+		end += 0x80000000;
+		device_printf(child, "SYS_RES_MEMORY: start: 0x%08lX end: 0x%08lX\n",start,end); 
 		break;
 	case SYS_RES_IOPORT:
 		rm = &sc->sc_io_rman;
@@ -312,12 +315,15 @@
 	}
 
 	rv = rman_reserve_resource(rm, start, end, count, flags, child);
+	device_printf(child, "RMAN_RESERVE_RESOURCE: start: 0x%08lX end: 0x%08lX\n",
+		rman_get_start(rv),
+		rman_get_end(rv)); 
 	if (rv == NULL)
 		return (NULL);
 	rman_set_rid(rv, *rid);
 	if (type != SYS_RES_IRQ) {
 		if (type == SYS_RES_MEMORY)
-			bh += (rman_get_start(rv));
+			bh = (rman_get_start(rv));
 		rman_set_bustag(rv, bt);
 		rman_set_bushandle(rv, bh);
 		if (flags & RF_ACTIVE) {
Index: iq80321reg.h
===================================================================
--- iq80321reg.h	(revision 197735)
+++ iq80321reg.h	(working copy)
@@ -80,7 +80,7 @@
  * We allocate a page table for VA 0xfe400000 (4MB) and map the
  * PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
  */
-#define	IQ80321_IOPXS_VBASE	0xfe400000UL
+#define	IQ80321_IOPXS_VBASE	0xfe000000UL
 #define	IQ80321_IOW_VBASE	IQ80321_IOPXS_VBASE
 #define	IQ80321_80321_VBASE	(IQ80321_IOW_VBASE +			\
 				 VERDE_OUT_XLATE_IO_WIN_SIZE)